/******************************************************************************
 * @file     delay.h
 * @brief    Time-Delay module header file.
 * @version  V1.8.0
 * @date     31-Dec-2021
 *
 * @note
 * Copyright (C) 2021 Spintrol Limited. All rights reserved.
 *
 * @attention
 * THIS SOFTWARE JUST PROVIDES CUSTOMERS WITH CODING INFORMATION REGARDING
 * THEIR PRODUCTS, WHICH AIMS AT SAVING TIME FOR THEM. SPINTROL SHALL NOT BE
 * LIABLE FOR THE USE OF THE SOFTWARE. SPINTROL DOES NOT GUARANTEE THE
 * CORRECTNESS OF THIS SOFTWARE AND RESERVES THE RIGHT TO MODIFY THE SOFTWARE
 * WITHOUT NOTIFICATION.
 *
 ******************************************************************************/


#ifndef DELAY_H
#define DELAY_H

#ifdef __cplusplus
extern "C" {
#endif


#include "spc1168.h"




/******************************************************************************
 * @brief      Delay type selection
 * @param[in]  DELAY_TYPE
 *             - \ref DELAY_BY_SW_FLASH
 *             - \ref DELAY_BY_SW_SRAM
 *             - \ref DELAY_BY_HW_TIMER0
 *             - \ref DELAY_BY_HW_TIMER1
 *             - \ref DELAY_BY_HW_TIMER2
 *
 * @detail     SPC1168 delay function supports 2 kinds of delay
 *             (1) CPU delay
 *                 Please select #define  DELAY_BY_SW_FLASH or DELAY_BY_SW_SRAM
 *                 CPU delay is made by a counter loop but with less precision.
 *                 If interrupt exerts while delay is running, the delay time will increase.
 *                 However it save hardware source that timer free.
 *                 Note:
 *                 CPU              Max delay time (sec)
 *                 150MHz           <28633
 *                 120MHz           <35791
 *                 40 MHz           <107374
 *
 *             (2) Delay with timer
 *                 Please select #define  DELAY_BY_HW_TIMERx x=0~2
 *                 This type of delay realized by hardware timer which provides precisise delay.
 *                 It has a timeout mechanism to prevent a dead lock if timer hardware is disabled
 *                 by other events.
 *                 CPU              Max delay time (with timeout) (sec)
 *                 150MHz           <7158    about 2 hour
 *                 120MHz           <8947
 *                 40 MHz           <26843
 *                 PCLK             Max delay time (without timeout) (sec)
 *                 37.5MHz          114532
 *
 ******************************************************************************/
#if   defined(DELAY_BY_HW_TIMER0)
#define DELAY_TIMER             (TIMER0)
#elif defined(DELAY_BY_HW_TIMER1)
#define DELAY_TIMER             (TIMER1)
#elif defined(DELAY_BY_HW_TIMER2)
#define DELAY_TIMER             (TIMER2)
#elif !defined(DELAY_BY_SW_SRAM)
#define DELAY_BY_SW_FLASH
#endif




/**
 *  @brief  Delay Public Function Declaration
 */
void Delay_Init(void);
void Delay_Ms(uint32_t nms);
void Delay_Us(uint32_t nus);


#ifdef __cplusplus
}
#endif /* extern "C" */

#endif /* DELAY_H */


/******************* (C) COPYRIGHT 2021 SPINTROL LIMITED CO. *****END OF FILE****/
