/******************************************************************************
 * @file     main.c
 * @brief    Main program body
 * @version  V4.0.1
 * @date     30-July-2026
 *
 * @note
 * Copyright (C) 2022 Spintrol Electronic Technology (Shanghai) Co., Ltd.. All rights reserved.
 *
 * @attention
 * THIS SOFTWARE JUST PROVIDES CUSTOMERS WITH CODING INFORMATION REGARDING
 * THEIR PRODUCTS, WHICH AIMS AT SAVING TIME FOR THEM. SPINTROL SHALL NOT BE
 * LIABLE FOR THE USE OF THE SOFTWARE. SPINTROL DOES NOT GUARANTEE THE
 * CORRECTNESS OF THIS SOFTWARE AND RESERVES THE RIGHT TO MODIFY THE SOFTWARE
 * WITHOUT NOTIFICATION.
 *
 ******************************************************************************/

#include<stdio.h>

#if defined(SPC1158)
#include "spc1158.h"
#elif defined(SPD1148)
#include "spd1148.h"
#elif defined(SPD1178)
#include "spd1178.h"
#elif defined(SPD1188)
#include "spd1188.h"
#elif defined(SPD1163)
#include "spd1163.h"
#else
#include "spc1168.h"
#endif

#if defined(SPD1163)
    #define             PWM_Sel                PWM2
    #define             PIN_PWMA               GPIO_38
    #define             PIN_PWMA_CH            GPIO38_PWM2A
    #define             PIN_PWMB               GPIO_39
    #define             PIN_PWMB_CH            GPIO39_PWM2B
#else
    #define             PWM_Sel                PWM5
    #define             PIN_PWMA               GPIO_36
    #define             PIN_PWMA_CH            GPIO36_PWM5A
    #define             PIN_PWMB               GPIO_37
    #define             PIN_PWMB_CH            GPIO37_PWM5B
#endif

/* This macro is used to get the PWM period with a specified frequency */
#define                PWMPeriod(u32PWMFreqHz)               ((CLOCK_GetModuleClock(PWM_MODULE))/u32PWMFreqHz)/2;
#define                PWM_FREQ                              20000                                             /* 20kHz PWM */
#define                PWM_DB_NS                             1000                                              /* 1000ns */

uint32_t               u32PWMPeriod;


/*************************************************************************************************************************
*
* @brief      In this case, 20kHz waveform with 25% duty will be output through PWM_Sel A/B channel respectively, so the high
*             level is 2.5e4ns=25us in one period(50us). but 1us delay will add to the rising edge of channel A and another
*             1us to the fall edge of channel B with the sub-module dead zone is working. As a result, the high level is
*             (25-1=24)us (low level is 50-24=26us) in one period of channel A, and the channel B is the same as channel A,
*             but a phase offset between channel A and B. There give a sketch map.
*
*                                                                |<---------- one period ---------> |
*                                                          ->|1us|<-                                |
*                                                            |                                      |
*                                                            |    ---------                         |
*                                                            |   |         |                        |
*                                                            |   |         |                        |
*                            PWM_SelA              -----------------           -----------------------------
*                            PWM_SelB              -------------            ->|1us|<------------------------
*                                                            |                 |                |
*                                                            |                 |                |   |
*                                                             -----------------               ->|1us|<-
*                                                            |                                  |
*                                                            |                                  |
*                                                            |<----------- one period --------->|
*
*************************************************************************************************************************/


int main()
{
    FLASH_WALLOW();

#if defined(SPC1158)
    FLASH_SetTiming(100000000);
    /* Disable flash write access after flash operation had done */
    FLASH_WDIS();

    CLOCK_InitWithRCO(100000000UL);
#else
    FLASH_SetTiming(200000000);
    /* Disable flash write access after flash operation had done */
    FLASH_WDIS();

    CLOCK_InitWithRCO(200000000UL);
#endif

    Delay_Init();

    /*
     * Init the UART
     *
     * 1.Set the GPIO34/35 as UART FUNC
     *
     * 2.Enable the UART CLK
     *
     * 3.Set the rest para
     */
    GPIO_SetPinChannel(GPIO_34, GPIO34_UART_TXD);
    GPIO_SetPinChannel(GPIO_35, GPIO35_UART_RXD);
    CLOCK_EnableModule(UART_MODULE);
    UART_Init(UART, 38400);

    /*
     * 1. Init PWM_Sel and output 20kHz waveform on channel A
     *
     * 2. Add 1us dead band at falling and rising edge
     *
     * 3. Channel B output the channel A waveform which added DB
     */
    PWM_ComplementaryPairChannelInit(PWM_Sel, PWM_FREQ, PWM_DB_NS);

    /* Set PWM_SelA output 75% duty waveform */
    u32PWMPeriod = PWMPeriod(PWM_FREQ);
    PWM_SetCMPA(PWM_Sel, u32PWMPeriod / 4);

    /* Select the channel A/B output of PWM_Sel respectively */
    GPIO_SetPinChannel(PIN_PWMA, PIN_PWMA_CH);
    GPIO_SetPinChannel(PIN_PWMB, PIN_PWMB_CH);

    /* Start PWM_Sel */
    PWM_RunCounter(PWM_Sel);

    while (1)
    {

    }
}
