/*******************************************************************************
 * @file     hv_bitfield.h
 * @brief    High voltage module register bit-field definition.
 * @version  V4.0.1
 * @date     30-July-2026
 *
 * @note
 * Copyright (C) 2022 Spintrol Electronic Technology (Shanghai) Co., Ltd.. All rights reserved.
 *
 * @attention
 * THIS SOFTWARE JUST PROVIDES CUSTOMERS WITH CODING INFORMATION REGARDING
 * THEIR PRODUCTS, WHICH AIMS AT SAVING TIME FOR THEM. SPINTROL SHALL NOT BE
 * LIABLE FOR THE USE OF THE SOFTWARE. SPINTROL DOES NOT GUARANTEE THE
 * CORRECTNESS OF THIS SOFTWARE AND RESERVES THE RIGHT TO MODIFY THE SOFTWARE
 * WITHOUT NOTIFICATION.
 *
 ******************************************************************************/


#ifndef HV_BITFIELD_H
#define HV_BITFIELD_H

#ifdef __cplusplus
extern "C" {
#endif




/********************************************************************************
*
* Module Name     HV
*
*
********************************************************************************/



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTS          OV
 *  @access     HV->GLBSTS.bit.OV
 *  @brief      Latched over-voltage status flag
 */
#define GLBSTS_ALL_OV_Pos (0)
#define GLBSTS_ALL_OV_Msk (0x1UL << GLBSTS_ALL_OV_Pos)

typedef enum
{
    GLBSTS_BIT_OV_NOT_OCCUR     = 0,  /*!< VDDG over voltage not occur   */
    GLBSTS_BIT_OV_OCCUR         = 1,  /*!< VDDG over voltage occurred    */
} GLBSTS_BIT_OV;

#define GLBSTS_ALL_OV_NOT_OCCUR     ((0x0UL) << GLBSTS_ALL_OV_Pos)
#define GLBSTS_ALL_OV_OCCUR         ((0x1UL) << GLBSTS_ALL_OV_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTS          OTWARN
 *  @access     HV->GLBSTS.bit.OTWARN
 *  @brief      Latched over-temperature warning status flag
 */
#define GLBSTS_ALL_OTWARN_Pos (1)
#define GLBSTS_ALL_OTWARN_Msk (0x1UL << GLBSTS_ALL_OTWARN_Pos)

typedef enum
{
    GLBSTS_BIT_OTWARN_NOT_OCCUR     = 0,  /*!< Over temperature warning not occur   */
    GLBSTS_BIT_OTWARN_OCCUR         = 1,  /*!< Over temperature warning occurred    */
} GLBSTS_BIT_OTWARN;

#define GLBSTS_ALL_OTWARN_NOT_OCCUR     ((0x0UL) << GLBSTS_ALL_OTWARN_Pos)
#define GLBSTS_ALL_OTWARN_OCCUR         ((0x1UL) << GLBSTS_ALL_OTWARN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTS          OC
 *  @access     HV->GLBSTS.bit.OC
 *  @brief      Latched over-current status flag
 */
#define GLBSTS_ALL_OC_Pos (2)
#define GLBSTS_ALL_OC_Msk (0x1UL << GLBSTS_ALL_OC_Pos)

typedef enum
{
    GLBSTS_BIT_OC_NOT_OCCUR     = 0,  /*!< Over current not occur   */
    GLBSTS_BIT_OC_OCCUR         = 1,  /*!< Over current occurred    */
} GLBSTS_BIT_OC;

#define GLBSTS_ALL_OC_NOT_OCCUR     ((0x0UL) << GLBSTS_ALL_OC_Pos)
#define GLBSTS_ALL_OC_OCCUR         ((0x1UL) << GLBSTS_ALL_OC_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTS          PFMMODE
 *  @access     HV->GLBSTS.bit.PFMMODE
 *  @brief      Buck PFM operation mode indicator
 */
#define GLBSTS_ALL_PFMMODE_Pos (3)
#define GLBSTS_ALL_PFMMODE_Msk (0x1UL << GLBSTS_ALL_PFMMODE_Pos)

typedef enum
{
    GLBSTS_BIT_PFMMODE_PWM_MODE     = 0,  /*!< Buck is in PWM mode   */
    GLBSTS_BIT_PFMMODE_PFM_MODE     = 1,  /*!< Buck is in PFM mode   */
} GLBSTS_BIT_PFMMODE;

#define GLBSTS_ALL_PFMMODE_PWM_MODE     ((0x0UL) << GLBSTS_ALL_PFMMODE_Pos)
#define GLBSTS_ALL_PFMMODE_PFM_MODE     ((0x1UL) << GLBSTS_ALL_PFMMODE_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTS          EAUNITY
 *  @access     HV->GLBSTS.bit.EAUNITY
 *  @brief      Error amplifier unit-gain mode indicator
 */
#define GLBSTS_ALL_EAUNITY_Pos (4)
#define GLBSTS_ALL_EAUNITY_Msk (0x1UL << GLBSTS_ALL_EAUNITY_Pos)

typedef enum
{
    GLBSTS_BIT_EAUNITY_NO      = 0,  /*!< Error amplifier is not in unig-gain mode   */
    GLBSTS_BIT_EAUNITY_YES     = 1,  /*!< Error amplifier is in unit-gain mode       */
} GLBSTS_BIT_EAUNITY;

#define GLBSTS_ALL_EAUNITY_NO      ((0x0UL) << GLBSTS_ALL_EAUNITY_Pos)
#define GLBSTS_ALL_EAUNITY_YES     ((0x1UL) << GLBSTS_ALL_EAUNITY_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTSCLR       OV
 *  @access     HV->GLBSTSCLR.bit.OV
 *  @brief      Over-voltage status clear
 */
#define GLBSTSCLR_ALL_OV_Pos (0)
#define GLBSTSCLR_ALL_OV_Msk (0x1UL << GLBSTSCLR_ALL_OV_Pos)

typedef enum
{
    GLBSTSCLR_BIT_OV_NO_EFFECT     = 0,  /*!< Write a 0 has no effect. Always readback 0                   */
    GLBSTSCLR_BIT_OV_CLEAR         = 1,  /*!< Write a 1 clears GLBSTS[OV]. This bit is self-cleared to 0   */
} GLBSTSCLR_BIT_OV;

#define GLBSTSCLR_ALL_OV_NO_EFFECT     ((0x0UL) << GLBSTSCLR_ALL_OV_Pos)
#define GLBSTSCLR_ALL_OV_CLEAR         ((0x1UL) << GLBSTSCLR_ALL_OV_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTSCLR       OTWARN
 *  @access     HV->GLBSTSCLR.bit.OTWARN
 *  @brief      Over-temperature warning status clear
 */
#define GLBSTSCLR_ALL_OTWARN_Pos (1)
#define GLBSTSCLR_ALL_OTWARN_Msk (0x1UL << GLBSTSCLR_ALL_OTWARN_Pos)

typedef enum
{
    GLBSTSCLR_BIT_OTWARN_NO_EFFECT     = 0,  /*!< Write a 0 has no effect. Always readback 0                   */
    GLBSTSCLR_BIT_OTWARN_CLEAR         = 1,  /*!< Write a 1 clears GLBSTS[OT]. This bit is self-cleared to 0   */
} GLBSTSCLR_BIT_OTWARN;

#define GLBSTSCLR_ALL_OTWARN_NO_EFFECT     ((0x0UL) << GLBSTSCLR_ALL_OTWARN_Pos)
#define GLBSTSCLR_ALL_OTWARN_CLEAR         ((0x1UL) << GLBSTSCLR_ALL_OTWARN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              GLBSTSCLR       OC
 *  @access     HV->GLBSTSCLR.bit.OC
 *  @brief      Over-current status clear
 */
#define GLBSTSCLR_ALL_OC_Pos (2)
#define GLBSTSCLR_ALL_OC_Msk (0x1UL << GLBSTSCLR_ALL_OC_Pos)

typedef enum
{
    GLBSTSCLR_BIT_OC_NO_EFFECT     = 0,  /*!< Write a 0 has no effect. Always readback 0                   */
    GLBSTSCLR_BIT_OC_CLEAR         = 1,  /*!< Write a 1 clears GLBSTS[OC]. This bit is self-cleared to 0   */
} GLBSTSCLR_BIT_OC;

#define GLBSTSCLR_ALL_OC_NO_EFFECT     ((0x0UL) << GLBSTSCLR_ALL_OC_Pos)
#define GLBSTSCLR_ALL_OC_CLEAR         ((0x1UL) << GLBSTSCLR_ALL_OC_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              TZCTL           OVEN
 *  @access     HV->TZCTL.bit.OVEN
 *  @brief      Enable over-voltage as trip-zone event
 */
#define TZCTL_ALL_OVEN_Pos (0)
#define TZCTL_ALL_OVEN_Msk (0x1UL << TZCTL_ALL_OVEN_Pos)

typedef enum
{
    TZCTL_BIT_OVEN_DISABLE     = 0,  /*!< Over-voltage will not trig a trip-zone event   */
    TZCTL_BIT_OVEN_ENABLE      = 1,  /*!< Over-voltage will trig a trip-zone event       */
} TZCTL_BIT_OVEN;

#define TZCTL_ALL_OVEN_DISABLE     ((0x0UL) << TZCTL_ALL_OVEN_Pos)
#define TZCTL_ALL_OVEN_ENABLE      ((0x1UL) << TZCTL_ALL_OVEN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              TZCTL           OTWARNEN
 *  @access     HV->TZCTL.bit.OTWARNEN
 *  @brief      Enable over-temperature as trip-zone event
 */
#define TZCTL_ALL_OTWARNEN_Pos (1)
#define TZCTL_ALL_OTWARNEN_Msk (0x1UL << TZCTL_ALL_OTWARNEN_Pos)

typedef enum
{
    TZCTL_BIT_OTWARNEN_DISABLE     = 0,  /*!< Over-temperature will not trig a trip-zone event   */
    TZCTL_BIT_OTWARNEN_ENABLE      = 1,  /*!< Over-temperature will trig a trip-zone event       */
} TZCTL_BIT_OTWARNEN;

#define TZCTL_ALL_OTWARNEN_DISABLE     ((0x0UL) << TZCTL_ALL_OTWARNEN_Pos)
#define TZCTL_ALL_OTWARNEN_ENABLE      ((0x1UL) << TZCTL_ALL_OTWARNEN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              TZCTL           OCEN
 *  @access     HV->TZCTL.bit.OCEN
 *  @brief      Enable over-current as trip-zone event
 */
#define TZCTL_ALL_OCEN_Pos (2)
#define TZCTL_ALL_OCEN_Msk (0x1UL << TZCTL_ALL_OCEN_Pos)

typedef enum
{
    TZCTL_BIT_OCEN_DISABLE     = 0,  /*!< Over-current will not trig a trip-zone event   */
    TZCTL_BIT_OCEN_ENABLE      = 1,  /*!< Over-current will trig a trip-zone event       */
} TZCTL_BIT_OCEN;

#define TZCTL_ALL_OCEN_DISABLE     ((0x0UL) << TZCTL_ALL_OCEN_Pos)
#define TZCTL_ALL_OCEN_ENABLE      ((0x1UL) << TZCTL_ALL_OCEN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              TZCTL           POL
 *  @access     HV->TZCTL.bit.POL
 *  @brief      Trip-zone signal output polarity
 */
#define TZCTL_ALL_POL_Pos (3)
#define TZCTL_ALL_POL_Msk (0x1UL << TZCTL_ALL_POL_Pos)

typedef enum
{
    TZCTL_BIT_POL_LOW      = 0,  /*!< Output low upon trip-zone event    */
    TZCTL_BIT_POL_HIGH     = 1,  /*!< Output high upon trip-zone event   */
} TZCTL_BIT_POL;

#define TZCTL_ALL_POL_LOW      ((0x0UL) << TZCTL_ALL_POL_Pos)
#define TZCTL_ALL_POL_HIGH     ((0x1UL) << TZCTL_ALL_POL_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        PWDN
 *  @access     HV->BUCKCTL0.bit.PWDN
 *  @brief      Power down BUCK DCDC switching regulator
 */
#define BUCKCTL0_ALL_PWDN_Pos (0)
#define BUCKCTL0_ALL_PWDN_Msk (0x1UL << BUCKCTL0_ALL_PWDN_Pos)

typedef enum
{
    BUCKCTL0_BIT_PWDN_NO      = 0,  /*!< BUCK DCDC switching regulator is in operation   */
    BUCKCTL0_BIT_PWDN_YES     = 1,  /*!< Power down the BUCK DCDC swithcing regulator    */
} BUCKCTL0_BIT_PWDN;

#define BUCKCTL0_ALL_PWDN_NO      ((0x0UL) << BUCKCTL0_ALL_PWDN_Pos)
#define BUCKCTL0_ALL_PWDN_YES     ((0x1UL) << BUCKCTL0_ALL_PWDN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        V33AON
 *  @access     HV->BUCKCTL0.bit.V33AON
 *  @brief      Make regulated 3.3V always-on regardless of over-voltage
 */
#define BUCKCTL0_ALL_V33AON_Pos (1)
#define BUCKCTL0_ALL_V33AON_Msk (0x1UL << BUCKCTL0_ALL_V33AON_Pos)

typedef enum
{
    BUCKCTL0_BIT_V33AON_NO      = 0,  /*!< No 3.3V output if the regulated value is over-voltage       */
    BUCKCTL0_BIT_V33AON_YES     = 1,  /*!< Regulated 3.3V is always avaialbe even it is over-voltage   */
} BUCKCTL0_BIT_V33AON;

#define BUCKCTL0_ALL_V33AON_NO      ((0x0UL) << BUCKCTL0_ALL_V33AON_Pos)
#define BUCKCTL0_ALL_V33AON_YES     ((0x1UL) << BUCKCTL0_ALL_V33AON_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        FRCPWM
 *  @access     HV->BUCKCTL0.bit.FRCPWM
 *  @brief      Force PWM operation mode
 */
#define BUCKCTL0_ALL_FRCPWM_Pos (2)
#define BUCKCTL0_ALL_FRCPWM_Msk (0x1UL << BUCKCTL0_ALL_FRCPWM_Pos)

typedef enum
{
    BUCKCTL0_BIT_FRCPWM_NORMAL     = 0,  /*!< BUCK operation mode is self controlled by the loop   */
    BUCKCTL0_BIT_FRCPWM_FORCE      = 1,  /*!< Force BUCK operates in PWM mode                      */
} BUCKCTL0_BIT_FRCPWM;

#define BUCKCTL0_ALL_FRCPWM_NORMAL     ((0x0UL) << BUCKCTL0_ALL_FRCPWM_Pos)
#define BUCKCTL0_ALL_FRCPWM_FORCE      ((0x1UL) << BUCKCTL0_ALL_FRCPWM_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        NOOC4PFM
 *  @access     HV->BUCKCTL0.bit.NOOC4PFM
 *  @brief      Disable over-current detection in PFM mode
 */
#define BUCKCTL0_ALL_NOOC4PFM_Pos (3)
#define BUCKCTL0_ALL_NOOC4PFM_Msk (0x1UL << BUCKCTL0_ALL_NOOC4PFM_Pos)

typedef enum
{
    BUCKCTL0_BIT_NOOC4PFM_NORMAL     = 0,  /*!< Over-current detection operates as normal   */
    BUCKCTL0_BIT_NOOC4PFM_NOOC       = 1,  /*!< Over-current detection is disabled          */
} BUCKCTL0_BIT_NOOC4PFM;

#define BUCKCTL0_ALL_NOOC4PFM_NORMAL     ((0x0UL) << BUCKCTL0_ALL_NOOC4PFM_Pos)
#define BUCKCTL0_ALL_NOOC4PFM_NOOC       ((0x1UL) << BUCKCTL0_ALL_NOOC4PFM_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        DBZCMP4PFM
 *  @access     HV->BUCKCTL0.bit.DBZCMP4PFM
 *  @brief      De-bias ZCD comparator in PFM mode
 */
#define BUCKCTL0_ALL_DBZCMP4PFM_Pos (4)
#define BUCKCTL0_ALL_DBZCMP4PFM_Msk (0x1UL << BUCKCTL0_ALL_DBZCMP4PFM_Pos)

typedef enum
{
    BUCKCTL0_BIT_DBZCMP4PFM_NORMAL     = 0,  /*!< Bias current is as normal         */
    BUCKCTL0_BIT_DBZCMP4PFM_HALF       = 1,  /*!< Bias current is reduced by half   */
} BUCKCTL0_BIT_DBZCMP4PFM;

#define BUCKCTL0_ALL_DBZCMP4PFM_NORMAL     ((0x0UL) << BUCKCTL0_ALL_DBZCMP4PFM_Pos)
#define BUCKCTL0_ALL_DBZCMP4PFM_HALF       ((0x1UL) << BUCKCTL0_ALL_DBZCMP4PFM_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        DBMCMP4PFM
 *  @access     HV->BUCKCTL0.bit.DBMCMP4PFM
 *  @brief      De-bias main comparator in PFM mode
 */
#define BUCKCTL0_ALL_DBMCMP4PFM_Pos (5)
#define BUCKCTL0_ALL_DBMCMP4PFM_Msk (0x1UL << BUCKCTL0_ALL_DBMCMP4PFM_Pos)

typedef enum
{
    BUCKCTL0_BIT_DBMCMP4PFM_NORMAL     = 0,  /*!< Bias current is as normal         */
    BUCKCTL0_BIT_DBMCMP4PFM_HALF       = 1,  /*!< Bias current is reduced by half   */
} BUCKCTL0_BIT_DBMCMP4PFM;

#define BUCKCTL0_ALL_DBMCMP4PFM_NORMAL     ((0x0UL) << BUCKCTL0_ALL_DBMCMP4PFM_Pos)
#define BUCKCTL0_ALL_DBMCMP4PFM_HALF       ((0x1UL) << BUCKCTL0_ALL_DBMCMP4PFM_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL0        FREQSEL
 *  @access     HV->BUCKCTL0.bit.FREQSEL
 *  @brief      BUCK swiching frequency select
 */
#define BUCKCTL0_ALL_FREQSEL_Pos (6)
#define BUCKCTL0_ALL_FREQSEL_Msk (0x3UL << BUCKCTL0_ALL_FREQSEL_Pos)

typedef enum
{
    BUCKCTL0_BIT_FREQSEL_400_kHz      = 0,  /*!< 400kHz    */
    BUCKCTL0_BIT_FREQSEL_600_kHz      = 1,  /*!< 600kHz    */
    BUCKCTL0_BIT_FREQSEL_1200_kHz     = 2,  /*!< 1200kHz   */
    BUCKCTL0_BIT_FREQSEL_2400_kHz     = 3,  /*!< 2400kHz   */
} BUCKCTL0_BIT_FREQSEL;

#define BUCKCTL0_ALL_FREQSEL_400_kHz      ((0x0UL) << BUCKCTL0_ALL_FREQSEL_Pos)
#define BUCKCTL0_ALL_FREQSEL_600_kHz      ((0x1UL) << BUCKCTL0_ALL_FREQSEL_Pos)
#define BUCKCTL0_ALL_FREQSEL_1200_kHz     ((0x2UL) << BUCKCTL0_ALL_FREQSEL_Pos)
#define BUCKCTL0_ALL_FREQSEL_2400_kHz     ((0x3UL) << BUCKCTL0_ALL_FREQSEL_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL1        SELOV
 *  @access     HV->BUCKCTL1.bit.SELOV
 *  @brief      Over voltage threshold select
 */
#define BUCKCTL1_ALL_SELOV_Pos (0)
#define BUCKCTL1_ALL_SELOV_Msk (0x3UL << BUCKCTL1_ALL_SELOV_Pos)

typedef enum
{
    BUCKCTL1_BIT_SELOV_15dot2_V      = 0,  /*!< Assert over-voltage if VDDG>15.2V and de-assert if VDDG<15.04V    */
    BUCKCTL1_BIT_SELOV_18dot08_V     = 1,  /*!< Assert over-voltage if VDDG>18.08V and de-assert if VDDG<17.92V   */
    BUCKCTL1_BIT_SELOV_20dot16_V     = 2,  /*!< Assert over-voltage if VDDG>20.16V and de-assert if VDDG<20V      */
    BUCKCTL1_BIT_SELOV_24dot16_V     = 3,  /*!< Assert over-voltage if VDDG>24.16V and de-assert if VDDG<24V      */
} BUCKCTL1_BIT_SELOV;

#define BUCKCTL1_ALL_SELOV_15dot2_V      ((0x0UL) << BUCKCTL1_ALL_SELOV_Pos)
#define BUCKCTL1_ALL_SELOV_18dot08_V     ((0x1UL) << BUCKCTL1_ALL_SELOV_Pos)
#define BUCKCTL1_ALL_SELOV_20dot16_V     ((0x2UL) << BUCKCTL1_ALL_SELOV_Pos)
#define BUCKCTL1_ALL_SELOV_24dot16_V     ((0x3UL) << BUCKCTL1_ALL_SELOV_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL1        SELOTWARN
 *  @access     HV->BUCKCTL1.bit.SELOTWARN
 *  @brief      Over-temperature warning threshold select
 */
#define BUCKCTL1_ALL_SELOTWARN_Pos (2)
#define BUCKCTL1_ALL_SELOTWARN_Msk (0x7UL << BUCKCTL1_ALL_SELOTWARN_Pos)

typedef enum
{
    BUCKCTL1_BIT_SELOTWARN_146_DEGREE     = 0,  /*!< 146 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_138_DEGREE     = 1,  /*!< 138 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_131_DEGREE     = 2,  /*!< 131 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_122_DEGREE     = 3,  /*!< 122 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_114_DEGREE     = 4,  /*!< 114 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_107_DEGREE     = 5,  /*!< 107 centigrade degree   */
    BUCKCTL1_BIT_SELOTWARN_99_DEGREE      = 6,  /*!< 99 centigrade degree    */
} BUCKCTL1_BIT_SELOTWARN;

#define BUCKCTL1_ALL_SELOTWARN_146_DEGREE     ((0x0UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_138_DEGREE     ((0x1UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_131_DEGREE     ((0x2UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_122_DEGREE     ((0x3UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_114_DEGREE     ((0x4UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_107_DEGREE     ((0x5UL) << BUCKCTL1_ALL_SELOTWARN_Pos)
#define BUCKCTL1_ALL_SELOTWARN_99_DEGREE      ((0x6UL) << BUCKCTL1_ALL_SELOTWARN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL1        SSEN
 *  @access     HV->BUCKCTL1.bit.SSEN
 *  @brief      Spread spectrum enable
 */
#define BUCKCTL1_ALL_SSEN_Pos (5)
#define BUCKCTL1_ALL_SSEN_Msk (0x1UL << BUCKCTL1_ALL_SSEN_Pos)

typedef enum
{
    BUCKCTL1_BIT_SSEN_DISABLE     = 0,  /*!< Disable. Capacitor code is fixed as 256          */
    BUCKCTL1_BIT_SSEN_ENABLE      = 1,  /*!< Enable. Capacitor code is sweeping up and down   */
} BUCKCTL1_BIT_SSEN;

#define BUCKCTL1_ALL_SSEN_DISABLE     ((0x0UL) << BUCKCTL1_ALL_SSEN_Pos)
#define BUCKCTL1_ALL_SSEN_ENABLE      ((0x1UL) << BUCKCTL1_ALL_SSEN_Pos)



/**
 *  @hierarchy       Module          Register        Bitfield
 *                   HV              BUCKCTL1        SSAMP
 *  @access     HV->BUCKCTL1.bit.SSAMP
 *  @brief      Spread spectrum amplitude
 */
#define BUCKCTL1_ALL_SSAMP_Pos (6)
#define BUCKCTL1_ALL_SSAMP_Msk (0x3UL << BUCKCTL1_ALL_SSAMP_Pos)

typedef enum
{
    BUCKCTL1_BIT_SSAMP_192_TO_320     = 0,  /*!< Capacitor code sweeps between 192 and 320   */
    BUCKCTL1_BIT_SSAMP_171_TO_341     = 1,  /*!< Capacitor code sweeps between 171 and 341   */
    BUCKCTL1_BIT_SSAMP_128_TO_384     = 2,  /*!< Capacitor code sweeps between 128 and 384   */
    BUCKCTL1_BIT_SSAMP_0_TO_511       = 3,  /*!< Capacitor code sweeps between 0 and 511     */
} BUCKCTL1_BIT_SSAMP;

#define BUCKCTL1_ALL_SSAMP_192_TO_320     ((0x0UL) << BUCKCTL1_ALL_SSAMP_Pos)
#define BUCKCTL1_ALL_SSAMP_171_TO_341     ((0x1UL) << BUCKCTL1_ALL_SSAMP_Pos)
#define BUCKCTL1_ALL_SSAMP_128_TO_384     ((0x2UL) << BUCKCTL1_ALL_SSAMP_Pos)
#define BUCKCTL1_ALL_SSAMP_0_TO_511       ((0x3UL) << BUCKCTL1_ALL_SSAMP_Pos)




#ifdef __cplusplus
}
#endif /* extern "C" */

#endif /* HV_BITFIELD_H */


/******************* Copyright (C) 2022 Spintrol Electronic Technology (Shanghai) Co., Ltd. ***** END OF FILE ****/
